VHDL, Verilog and SystemC with Blue Pacific




Blue Pacific Computing, Inc. -- San Diego, California
Phone: (858) 484-7500
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Preliminary Information on BlueHDL Simulation Tools

The following is preliminary information regarding the BlueHDL simulation tools. Student Versions of BlueHDL are now avaiable for downloading. Click here to download these simulation tools.

Click on any of the following topics to learn more:

VHDL, Verilog and SystemC with Linux, Solaris and MS Windows for Free

Blue Pacific's BlueHDL and BlueWave simulation tools provide VHDL, Verilog and SystemC digital simulation capabilities. BlueHDL consists of a VHDL compiler, a simulation engine and the BlueWave GUI. The BlueWave GUI also doubles as a results viewer for any simulator that can output VCD files, including Mentor Graphics* ModelSim, Cadence* NC Verilog and Verilog XL, and Open SystemC. The tools run under Linux, Sun Sparc Solaris and Microsoft Windows. The tools provide an intuitive, easy-to-use interface.

While the BlueWave GUI runs under all versions of Windows, The BlueHDL VHDL simulator does not run under Windows XP or 2000. Many people use the BlueWave GUI to view SystemC results or in conjunction with Icarus Verilog.

The Student Versions are free and are available for downloading now. The Professional Versions are only available with a maintenance contract. The compilers, simulator and graphical user interface also offer some unique and interesting features such as:

  • behavioral, RTL and structural level simulation
  • simple "one-button compile" and "one-button simulate" operations
  • synthesis syntax checking
  • sensitivity list (event list) completeness checking
  • automatic set up of VHDL libraries
  • compile source code in any order, no need to recompile higher levels
  • printf-like $monitor and $display debugging commands
  • Object-Oriented C++ compiler based on PCCTS from Purdue University
  • built-in path to future multi-threaded, cycle-based engine
  • GUI written in Tcl/Tk allowing complete customization
  • optional batch-mode operation of compilers and simulator
  • both mouse point-and-click and console-based commands for interactive control
  • display of simulation results in both graphical waveform and tabular list formats
  • addition of new signals to waveform display without resimuluation
  • multiple zoom methods and cursor functions in waveform display
  • search for values in both waveform and list displays
  • display of waveforms in either digital or analog formats
  • PostScript file output for waveform display
  • prototyping window supports fully customized user control and display
  • utilities for interfacing to spice analog simulators and ATE gear
  • Value Change Dump (VCD) capability allowing display of results from other simulators.

See Table 1 below for details.

SystemC

The BlueWave VCD results viewer now supports the SystemC C++ hardware description language. We have always been attracted to the idea of using C/C++ as an HDL, but have not seen any standards emerging until recently. At DAC this year a lot more companies appeared to be jumping on the C/C++ HDL bandwagon, and in October Synopsys announced its support for SystemC. However, many experienced VHDL and Verilog designers are highly critical of using C/C++ as an HDL, saying that the world doesn't need another HDL. But they are missing the main point. A C/C++ HDL will not be a better HDL than VHDL or Verilog, but it will be a better language for hardware/software co-simulation. After looking closely at SystemC, we decided to add SystemC capability to BlueWave. To use SystemC, you first have to register with the SystemC organization and then download their kernel and documentation. The BlueHDL User's Manual contains instructions on how to use SystemC with our tools.

Click here to register and download SystemC from www.systemc.org.

Table 1: BlueHDL Version Capabilities
Version Sigs/Vars Display Sigs/Vars Events per Sig/Var Source Code Cost
BlueHDL VHDL Student 100 20 4k 20k bytes free
BlueWave Student VCD Viewer (download VHDL Student) 100 20 4k NA free

Learning VHDL, Verilog and SystemC with BlueHDL

 You can use BlueHDL to teach yourself VHDL and SystemC, or you can schedule an on-site class through your company. We offer classes for groups as small as five engineers. The classes are one to five days in length and focus on using our tools in concert with one of the languages, VHDL, Verilog or SystemC. See our class links for more information as it becomes available.

If you want to teach yourself, we recommend you start by going through the three tutorials in the BlueHDL User's Manual which use working code. Then you should begin reading a good textbook and trying out examples in the text with BlueHDL, and use the web.

VHDL, Verilog and SystemC Books

We have found several books to be extremely helpful in learning VHDL and Verilog. The books are:

1. The Designer's Guide to VHDL, Peter J. Ashenden, Morgan Kaufmann Publishers, 1996, ISBN 1-55860-270-4.

2. VHDL, Douglas L. Perry, McGraw-Hill, 1997, ISBN 0-07-049434-7.

3. Verilog HDL, A Guide to Digital Design and Synthesis, Samir Palnitkar, SunSoft Press, 1996, ISBN 0-13-451675-3.

4. HDL Chip Design, Douglas J. Smith, Doone Publishing, ISBN 0-9651934-3-8.

The best book on SystemC at this point is the User's Manual that comes with the distribution.

Using The Web to Learn VHDL, Verilog and SystemC

The web has many excellent resources for learning the HDL's. Check out these links on our website as a starting point. You can also use the comp.lang.vhdl and comp.lang.verilog usenet newsgroups to ask questions and discover HDL issues that are affecting other engineers.

*Matlab, Mentor Graphics ModelSim and Cadence are trademarks of their respective companies.